Lab5: User Space Paging
讓每個 user task 做到擁有自己的 virtual address space,簡便的作法是讓每個 task 擁有自己的 page table
Lab5: Identity Paging
Goals of this lab
- Understand ARMv8-A virtual memory system architecture.
- Understand how to design paging bookkeeping.
- Understand how to design multitasking with virtual memory.
- Understand how user programs loaded.
- Understand how to prevent invalid memory access.
- Understand how demand paging works.
- Understand how copy-on-write works.
Settings
Source: Armv8-A Address Translation
Lab4: Questions
Lab4: Preemptive Kernel
Kernel provides system calls for user tasks. When a low priority task call a system call with long execution time. High priority task would still be blocked even it becomes runnanble from sleep. A preemptive kernel could be preempted after interrupt handling. Hence, when an interrupt handler put a higher priority task from wait queue to runqueue, it can be immediately be scheduled. It’s an important trait for real time tasks.
Lab4: Wait for Event
UART is a typical example for wait queue. When a task call for uart_read, you should put it into the wait queue if there is no data to be read. In the uart read interrupt handler, it can put the task back to runqueue and the task could read bytes from buffer after getting scheduled.
Lab4: Lock
Armv8-A provides
ldxrandstxrfor exclusive access. You can either use compiler’s built-in function or hand written assembly. However, you need to enable MMU and data cache before using theldxrinstruction in real rpi3. So, you can now use a workaround such as disable preemption in real rpi3 or just give it a trial in QEMU which doesn’t have to enable MMU forldxr.
Lab4: System Call - signal
依據 IMPLEMENTATION OF SIGNAL HANDLING 的指引實作 signal
